US 11,843,048 B2
Method of manufacturing MOSFET having a semiconductor base substrate with a super junction structure
Daisuke Arai, Saitama (JP); Mizue Kitada, Saitama (JP); Takeshi Asada, Saitama (JP); Noriaki Suzuki, Saitama (JP); and Koichi Murakami, Saitama (JP)
Assigned to SHINDENGEN ELECTRIC MANUFACTURING CO., LTD., Tokyo (JP)
Filed by SHINDENGEN ELECTRIC MANUFACTURING CO., LTD., Tokyo (JP)
Filed on Apr. 22, 2022, as Appl. No. 17/726,536.
Application 17/726,536 is a division of application No. 16/603,700, granted, now 11,342,452, previously published as PCT/JP2017/047082, filed on Dec. 27, 2017.
Prior Publication US 2022/0246755 A1, Aug. 4, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/32 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7813 (2013.01) [H01L 29/0634 (2013.01); H01L 29/32 (2013.01); H01L 29/66734 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A method of manufacturing a MOSFET comprising:
preparing a predetermined structural body, the predetermined structural body including:
a semiconductor base substrate having an n-type column region and a p-type column region, the n-type column region and the p-type column region forming a super junction structure; and
a gate electrode formed on a first main surface side of the semiconductor base substrate by way of a gate insulation film; and
forming a crystal defect in the semiconductor base substrate, wherein
assuming (1) a region of the semiconductor base substrate configured to provide a main operation of the MOSFET when the semiconductor base substrate is completed as the MOSFET as an active region, (2) a region of the semiconductor base substrate disposed on an outer peripheral side of the active region and maintaining a withstand voltage of the MOSFET as an outer peripheral region, and (3) a region of the semiconductor base substrate disposed between the active region and the outer peripheral region as an active connecting region,
in the forming of the crystal defect, out of the active region, the active connecting region, and the outer peripheral region of the semiconductor base substrate, the crystal defects are formed only in the active region and the active connecting region, wherein
the preparing of the predetermined structural body includes forming the semiconductor base substrate and forming the gate electrode in this order, and
the crystal defect is formed after the forming of the gate electrode.