CPC H01L 23/49827 (2013.01) [H01L 23/3128 (2013.01); H01L 23/49861 (2013.01); H01L 24/13 (2013.01); H01L 25/0657 (2013.01)] | 20 Claims |
1. A method of manufacturing a semiconductor package, the method comprising:
forming a first package structure, the first package structure comprising a first connection member including a first redistribution layer, a first frame disposed on the first connection member and having a first through-portion, a first semiconductor chip disposed in the first through-portion and having a connection pad electrically connected to the first redistribution layer, and a first encapsulant disposed on the first connection member and covering at least a portion of each of the first frame and the first semiconductor chip;
forming a second package structure, the second package structure comprising a second connection member including a second redistribution layer, a second semiconductor chip disposed on the second connection member and having a second connection pad, and a second encapsulant disposed on the second connection member and covering at least a portion of the second semiconductor chip;
forming a first through-via disposed on the second connection member, the first through-via electrically connecting to the second redistribution layer; and
laminating the first package structure on the second package structure;
wherein, after the laminating, the first through-via penetrates through the first frame, the first encapsulant, and at least a portion of the first connection member, and is electrically connected to the first redistribution layer.
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