US 11,842,770 B2
Circuit methodology for highly linear and symmetric resistive processing unit
Tayfun Gokmen, Briarcliff Manor, NY (US); Seyoung Kim, White Plains, NY (US); Hyung-Min Lee, Yorktown Heights, NY (US); Wooram Lee, Briarcliff Manor, NY (US); and Paul Michael Solomon, Ossining, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Dec. 30, 2020, as Appl. No. 17/137,615.
Application 17/137,615 is a continuation of application No. 16/367,497, filed on Mar. 28, 2019, granted, now 10,950,304.
Application 16/367,497 is a continuation of application No. 15/831,059, filed on Dec. 4, 2017, granted, now 10,269,425, issued on Apr. 23, 2019.
Application 15/831,059 is a continuation of application No. 15/335,171, filed on Oct. 26, 2016, granted, now 9,852,790, issued on Dec. 26, 2017.
Prior Publication US 2021/0151102 A1, May 20, 2021
Int. Cl. G11C 16/04 (2006.01); G11C 13/00 (2006.01); G11C 7/10 (2006.01); G11C 11/54 (2006.01); G06N 3/049 (2023.01); G06N 3/084 (2023.01); G06N 3/088 (2023.01); G06N 3/065 (2023.01); G06N 3/02 (2006.01)
CPC G11C 13/004 (2013.01) [G06N 3/02 (2013.01); G06N 3/049 (2013.01); G06N 3/065 (2023.01); G06N 3/084 (2013.01); G06N 3/088 (2013.01); G11C 7/1006 (2013.01); G11C 11/54 (2013.01); G11C 13/0002 (2013.01); G11C 13/0007 (2013.01); G11C 13/0038 (2013.01); G11C 13/0069 (2013.01); G11C 2213/77 (2013.01)] 20 Claims
OG exemplary drawing
 
16. An array of processing units, each processing unit comprising:
a circuit part; and
a second circuit part connected to the circuit part,
wherein the second circuit part is discharged by the circuit part.