US 11,842,700 B2
Backlight reconstruction and compensation-based throttling
Prabhu Rajamani, San Jose, CA (US); Liang Deng, Saratoga, CA (US); Oren Kerem, Sunnyvale, CA (US); Meir Harar, Tel-Aviv (IL); Ido Yaacov Soffair, Tel-Aviv (IL); Assaf Menachem, Hod Hasharon (IL); John H. Kelm, Belmont, CA (US); and Rohit K. Gupta, Santa Clara, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Feb. 14, 2023, as Appl. No. 18/109,691.
Application 18/109,691 is a division of application No. 17/368,522, filed on Jul. 6, 2021, granted, now 11,594,189.
Claims priority of provisional application 63/078,278, filed on Sep. 14, 2020.
Prior Publication US 2023/0197022 A1, Jun. 22, 2023
Int. Cl. G09G 3/34 (2006.01)
CPC G09G 3/3426 (2013.01) [G09G 2320/0233 (2013.01); G09G 2320/0646 (2013.01); G09G 2330/021 (2013.01); G09G 2360/18 (2013.01)] 20 Claims
OG exemplary drawing
 
15. A method, comprising:
receiving an indication that a frame of image data is to be displayed on a display having a backlight; and
using throttling circuitry, determining that backlight reconstruction and compensation is to be throttled for the image data based at least in part on another portion of a display pipeline running concurrently with the backlight reconstruction and compensation, wherein the backlight reconstruction comprises determining backlight information at a plurality of locations within the display using backlight reconstruction circuitry, and the compensation comprises compensating the image data based on the backlight reconstruction using the backlight reconstruction circuitry;
throttling the backlight reconstruction and compensation using the throttling circuitry, wherein throttling the backlight reconstruction and compensation comprises:
determining that a first clock cycle is to have the backlight reconstruction and compensation applied;
in response to determining that the first clock cycle is to have the backlight reconstruction and compensation applied, applying the backlight reconstruction and compensation using the backlight reconstruction circuitry using the first clock cycle;
determining that a second clock cycle is to not have the backlight reconstruction and compensation applied; and
in response to determining that the second clock cycle is to not have the backlight reconstruction and compensation applied, blocking the backlight reconstruction circuitry from computing the backlight reconstruction using the second clock cycle while the other portion of the display pipeline of the display is running.