| CPC H10D 62/121 (2025.01) [H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01)] | 20 Claims |
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1. A semiconductor device comprising:
an active pattern including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction, wherein the plurality of sheet patterns include an uppermost sheet pattern;
a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film; and
a source/drain pattern between adjacent ones of the plurality of gate structures, wherein the source/drain pattern includes a semiconductor liner film and a semiconductor filling film on the semiconductor liner film, wherein
at least one of the plurality gate structures includes an inner gate structure between the lower pattern and a lowermost sheet pattern among the plurality of sheet patterns, and an inner gate structure between adjacent ones of the plurality of sheet patterns, each of the inner gate structures including the gate electrode and the gate insulating film,
the semiconductor liner film includes silicon-germanium, and is in contact with the gate insulating film of each of the inner gate structures, and
a portion of the semiconductor liner film protrudes upwardly in the second direction beyond an upper surface of the uppermost sheet pattern.
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