US 12,495,484 B2
Printed circuit board, backplane architecture system, and communication device
Wenliang Li, Shenzhen (CN); Yongwei Chen, Shenzhen (CN); Xusheng Liu, Shenzhen (CN); Zhong Yan, Dongguan (CN); and Zewen Wang, Dongguan (CN)
Assigned to HUAWEI TECHNOLOGIES CO., LTD., Shenzhen (CN)
Filed by Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed on Apr. 27, 2023, as Appl. No. 18/308,267.
Application 18/308,267 is a continuation of application No. PCT/CN2021/127092, filed on Oct. 28, 2021.
Claims priority of application No. 202011180015.2 (CN), filed on Oct. 29, 2020.
Prior Publication US 2023/0269862 A1, Aug. 24, 2023
Int. Cl. H05K 1/02 (2006.01); H05K 1/11 (2006.01)
CPC H05K 1/0225 (2013.01) [H05K 1/116 (2013.01); H05K 2201/096 (2013.01); H05K 2201/09609 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A printed circuit board, comprising:
a plurality of layer structures disposed in a stacked manner and comprising ground layers and conductor layers that are alternately arranged, wherein an outermost layer structure of the layer structures comprises a disposing face;
a differential pair unit disposed on the disposing face and comprising:
signal via holes, wherein each of the signal via holes passes through at least some of the ground layers and the conductor layers and is connected to a first trace at a first conductor layer of the conductor layers; and
anti-pads respectively corresponding to the signal via holes, disposed on a first ground layer through which the signal via holes pass, and arranged at intervals; and
a shielding structure configured to shield the differential pair unit, disposed on the disposing face, and comprising:
primary ground holes located on sides of the differential pair unit; and
a first secondary ground hole disposed on the disposing face and located between the signal via holes,
wherein the primary ground holes and the first secondary ground hole separately pass through at least some of the conductor layers and the ground layers,
wherein the primary ground holes and the first secondary ground hole are separately grounded to a second ground layer through which the primary ground holes and the first secondary ground hole pass,
wherein the primary ground holes and the first secondary ground hole are arranged in a vertical direction to form a ground hole array, and
wherein the ground hole array and the anti-pads are combined to form a small-sized grid in three-dimensional space in a package region of the printed circuit board.