US 11,837,645 B2
Method of manufacturing a semiconductor device
Yoontae Hwang, Seoul (KR); Wandon Kim, Seongnam-si (KR); Geunwoo Kim, Seoul (KR); Heonbok Lee, Suwon-si (KR); Taegon Kim, Seoul (KR); and Hanki Lee, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 21, 2022, as Appl. No. 18/085,871.
Application 18/085,871 is a continuation of application No. 17/231,126, filed on Apr. 15, 2021, granted, now 11,538,916.
Claims priority of application No. 10-2020-0111053 (KR), filed on Sep. 1, 2020.
Prior Publication US 2023/0118906 A1, Apr. 20, 2023
Int. Cl. H01L 29/45 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 23/532 (2006.01); H01L 23/485 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/775 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 21/285 (2006.01)
CPC H01L 29/45 (2013.01) [H01L 21/28518 (2013.01); H01L 21/76805 (2013.01); H01L 21/76843 (2013.01); H01L 21/76859 (2013.01); H01L 21/76886 (2013.01); H01L 21/823431 (2013.01); H01L 23/485 (2013.01); H01L 23/5226 (2013.01); H01L 23/53266 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/41766 (2013.01); H01L 29/41791 (2013.01); H01L 29/42392 (2013.01); H01L 29/456 (2013.01); H01L 29/66795 (2013.01); H01L 29/775 (2013.01); H01L 29/7851 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a gate structure and a source/drain region on a fin active region at least one side of the gate structure on a substrate;
forming an insulating structure covering the fin active region, the gate structure, and the source/drain region;
forming a contact hole exposing a portion of the source/drain region through the insulating structure;
forming a seed layer having a first grain size on an exposed portion of the source/drain region;
applying an ion implantation process to the seed layer such that an upper region of the seed layer is amorphous or has a grain size different from the first grain size, and a lower region of the seed layer has the first grain size; and,
forming a contact plug having a second grain size on the seed layer within the contact hole.