US 11,837,554 B2
Semiconductor package and semiconductor device
Ryujiro Bando, Inagi (JP); and Hitoshi Ikei, Yokohama (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Mar. 12, 2021, as Appl. No. 17/200,411.
Claims priority of application No. 2020-046800 (JP), filed on Mar. 17, 2020.
Prior Publication US 2021/0296256 A1, Sep. 23, 2021
Int. Cl. H01L 23/552 (2006.01); H05K 1/03 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H05K 3/34 (2006.01); H05K 1/18 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/552 (2013.01) [H05K 1/0306 (2013.01); H01L 23/49816 (2013.01); H01L 24/32 (2013.01); H01L 25/0657 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/14511 (2013.01); H05K 1/181 (2013.01); H05K 3/3494 (2013.01); H05K 2201/0112 (2013.01); H05K 2201/0175 (2013.01); H05K 2201/0989 (2013.01); H05K 2201/10159 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a wiring substrate having a first surface and a second surface on a side opposite to the first surface;
at least one semiconductor chip provided on the first surface of the wiring substrate;
a sealing resin covering the first surface of the wiring substrate and surfaces of the at least one semiconductor chip;
an infrared reflection layer containing any of aluminum, aluminum oxide, and titanium oxide; and
an external terminal provided on the second surface of the wiring substrate, wherein the wiring substrate is electrically connectable with a printed wiring board through the external terminal, and
the infrared reflection layer is provided as an intermediate layer in the sealing resin on an upper side of a surface of the at least one semiconductor chip on a side opposite to a first surface side of the wiring substrate.