CPC G09G 3/20 (2013.01) [G09G 2300/0426 (2013.01); G09G 2300/0809 (2013.01); G09G 2300/0828 (2013.01); G09G 2310/0243 (2013.01); G09G 2310/0272 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01)] | 16 Claims |
1. An output buffer applied to a display device, comprising:
a buffer circuit configured to output an output signal to an output terminal based on a first input signal provided to a first input terminal and a second input signal provided to a second input terminal; and
a current supply circuit connected in parallel to the buffer circuit and configured to provide an auxiliary current to the output terminal based on the first input signal and the second input signal,
wherein the current supply circuit comprises:
a current source generator connected to the first input terminal and configured to generate a first current provided to a first current path or a second current provided to a second current path based on the first input signal and the second input signal;
a first current controller connected between the second input terminal and the current source generator and configured to control the first current based on a third current generated by the first current;
a second current controller connected between the second input terminal and the current source generator and configured to control the second current based on a fourth current generated by the second current;
a first current output configured to provide a value obtained by multiplying the first current by k times (where k is a positive real number) as the auxiliary current to the output terminal; and
a second current output configured to allow a value obtained by multiplying the second current by k times as the auxiliary current to flow from the output terminal to a ground.
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