US 11,836,029 B2
System on chip controlling memory power using handshake process and operating method thereof
Jin-Ook Song, Seoul (KR); Yun-Ju Kwon, Yongin-si (KR); Dong-Sik Cho, Yongin-si (KR); and Byung-Tak Lee, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on May 30, 2022, as Appl. No. 17/827,847.
Application 17/827,847 is a continuation of application No. 16/670,026, filed on Oct. 31, 2019, granted, now 11,347,292.
Application 16/670,026 is a continuation of application No. 15/677,050, filed on Aug. 15, 2017, granted, now 10,481,668, issued on Nov. 19, 2019.
Claims priority of application No. 10-2017-0009371 (KR), filed on Jan. 19, 2017.
Prior Publication US 2022/0291737 A1, Sep. 15, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/32 (2019.01); G11C 5/14 (2006.01); G06F 1/3225 (2019.01); G06F 15/78 (2006.01); G06F 1/3296 (2019.01); G06F 1/3287 (2019.01); G06F 1/3234 (2019.01)
CPC G06F 1/3225 (2013.01) [G06F 1/3275 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 15/7821 (2013.01); G11C 5/14 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of operating a system on chip (SOC) including a memory, a memory controller, and a power manager, the method comprising:
by the power manager, receiving a memory access level indicating a frequency of accesses to the memory from the memory controller;
by the power manager, determining whether the memory access level is included in any one of a plurality of access level ranges; and
by the power manager, outputting a control signal to the memory, depending on whether the memory access level is included in the any one of the plurality of access level ranges, wherein the control signal is to manage a supply power level of the memory through a handshake with the memory controller.