| CPC H10D 64/017 (2025.01) [H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 30/6219 (2025.01); H10D 62/115 (2025.01); H10D 84/013 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01)] | 20 Claims |
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1. A method, comprising:
forming fins from a substrate;
forming a dummy gate stack over portions of the fins;
forming epitaxial source/drain regions adjacent the dummy gate stack;
depositing a first inter-layer dielectric (ILD) over the epitaxial source/drain region;
replacing the dummy gate stack with a first gate stack;
forming a trench through the first gate stack and into an isolation region under the first gate stack; and
forming a dielectric layer in the trench by an atomic layer deposition process, wherein the dielectric layer is non-conformal; and the atomic layer deposition process comprises:
flowing a first precursor into a processing chamber;
flowing a second precursor into the processing chamber to form a conformal dielectric layer;
performing a treatment process on the conformal dielectric layer;
flowing the first precursor into the processing chamber; and
flowing the second precursor into the processing chamber to increase the thickness of the conformal dielectric layer non-uniformly.
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