| CPC H10B 12/30 (2023.02) [H10B 12/03 (2023.02)] | 18 Claims |

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1. A semiconductor structure, comprising:
a plurality of first capacitive structures located on a substrate, a plurality of first support columns are disposed on the substrate in parallel and spaced apart from each other, the plurality of first support columns are located in a same plane parallel to the substrate, each one of the plurality of first capacitive structures comprises a first lower electrode layer, a first dielectric layer and a first upper electrode layer, the first lower electrode layer covers the substrate and sidewall surfaces of the first support columns, the first dielectric layer covers the first lower electrode layer, and the first upper electrode layer covers the first dielectric layer; and
a plurality of first segmentation trenches that are disposed on the substrate in parallel and spaced apart from each other, wherein an extending direction of the first segmentation trenches is perpendicular to the first support columns, the first segmentation trenches divide each one of the plurality of first capacitive structures into a plurality of capacitors, a first insulation layer is disposed between corresponding first lower electrode layers of adjacent capacitors, the first insulation layer covers the substrate and the sidewall surface of the first support column corresponding to the first segmentation trench, and the corresponding first upper electrode layers of the adjacent capacitors are electrically connected to each other.
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