US 12,489,902 B2
Context initialization based on slice header flag and slice type
Kiran Misra, Vancouver, WA (US); and Christopher Segall, Camas, WA (US)
Assigned to VELOS MEDIA, LLC, Dallas, TX (US)
Filed by Velos Media, LLC, Dallas, TX (US)
Filed on Jul. 2, 2025, as Appl. No. 19/258,498.
Application 19/258,498 is a continuation of application No. 18/618,468, filed on Mar. 27, 2024, granted, now 12,375,675.
Application 18/618,468 is a continuation of application No. 18/124,198, filed on Mar. 21, 2023, granted, now 11,973,950.
Application 18/124,198 is a continuation of application No. 17/867,405, filed on Jul. 18, 2022, granted, now 11,647,197, issued on May 9, 2023.
Application 17/867,405 is a continuation of application No. 17/155,942, filed on Jan. 22, 2021, granted, now 11,412,226, issued on Aug. 9, 2022.
Application 17/155,942 is a continuation of application No. 16/689,851, filed on Nov. 20, 2019, granted, now 10,931,951, issued on Feb. 23, 2021.
Application 16/689,851 is a continuation of application No. 16/227,322, filed on Dec. 20, 2018, granted, now 10,531,091, issued on Jan. 7, 2020.
Application 16/227,322 is a continuation of application No. 15/285,619, filed on Oct. 5, 2016, granted, now 10,205,948, issued on Feb. 12, 2019.
Application 15/285,619 is a continuation of application No. 15/084,866, filed on Mar. 30, 2016, granted, now 9,491,471, issued on Nov. 8, 2016.
Application 15/084,866 is a continuation of application No. 13/294,100, filed on Nov. 10, 2011, granted, now 9,338,465, issued on May 10, 2016.
Application 13/294,100 is a continuation in part of application No. 13/174,564, filed on Jun. 30, 2011, granted, now 9,060,173, issued on Jun. 16, 2015.
Prior Publication US 2025/0337908 A1, Oct. 30, 2025
This patent is subject to a terminal disclaimer.
Int. Cl. H04N 19/13 (2014.01); H04N 19/159 (2014.01); H04N 19/172 (2014.01); H04N 19/174 (2014.01); H04N 19/436 (2014.01); H04N 19/44 (2014.01); H04N 19/46 (2014.01); H04N 19/577 (2014.01); H04N 19/70 (2014.01); H04N 19/157 (2014.01)
CPC H04N 19/13 (2014.11) [H04N 19/159 (2014.11); H04N 19/172 (2014.11); H04N 19/174 (2014.11); H04N 19/436 (2014.11); H04N 19/44 (2014.11); H04N 19/46 (2014.11); H04N 19/577 (2014.11); H04N 19/70 (2014.11); H04N 19/157 (2014.11)] 16 Claims
OG exemplary drawing
 
1. An encoding apparatus comprising at least one processor comprising processor circuitry configured individually and/or collectively to:
encode, in a bitstream, a presence flag indicating that an initialization flag is not included in the bitstream;
for a slice of a picture, select initialization values for initializing an arithmetic coding;
based on the presence flag indicating that the initialization flag is not included in the bitstream, select a first set of initialization values in response to a slice type of the slice being a B slice type, and select a second set of initialization values in response to the slice type of the slice being a P slice type;
initialize the arithmetic coding using the selected initialization values; and
encode one or more syntax elements of the slice using the arithmetic coding.