US 12,489,599 B2
Method and apparatus for integration-based timing recovery
Tianyu Wang, San Jose, CA (US)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed on Dec. 14, 2023, as Appl. No. 18/539,638.
Claims priority of provisional application 63/591,231, filed on Oct. 18, 2023.
Prior Publication US 2025/0132891 A1, Apr. 24, 2025
Int. Cl. H04L 7/00 (2006.01); H04L 7/033 (2006.01)
CPC H04L 7/0054 (2013.01) [H04L 7/0012 (2013.01); H04L 7/0337 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
sampling, by at least one data slicer of a receiver, a signal based on a clock sampling position to obtain a first data sample and a second data sample;
integrating, at an integrator of the receiver, the signal from the first data sample to the second data sample to generate an integrated voltage;
sampling, by a first data slicer of the receiver, the integrated voltage at a time of the second data sample to obtain an integrated sample; and
determining, by a phase detector of the receiver, whether the clock sampling position requires adjustment based on a sign of the integrated sample.