US 12,489,598 B2
Phase-based lock detector with programmable frequency offset tolerance
Andrew Fuller, Durham, NC (US)
Assigned to Rambus Inc., San Jose, CA (US)
Filed by Rambus Inc., San Jose, CA (US)
Filed on Nov. 13, 2023, as Appl. No. 18/507,288.
Claims priority of provisional application 63/384,467, filed on Nov. 21, 2022.
Prior Publication US 2024/0171368 A1, May 23, 2024
Int. Cl. H03D 3/24 (2006.01); H04L 7/00 (2006.01)
CPC H04L 7/0054 (2013.01) 18 Claims
OG exemplary drawing
 
1. A method for comparing a first clock signal with a second clock signal, the method comprising:
generating a first periodic signal phase dependent upon the first clock signal;
generating a second periodic signal phase dependent upon the first clock signal and phase offset from the first periodic signal;
sampling the first and second periodic signals timed to a sequence of edges of the second clock signal to produce a sequence of states, each state including concurrent samples of the first and second periodic signals, wherein the sequence of states repeats a pattern of the states when the first clock signal is phase aligned with the second clock signal;
evaluating state transitions in the sequence of states; and
indicating a phase misalignment between the first clock signal and the second clock signal responsive to a deviation from the pattern of the states.