| CPC H04B 1/0475 (2013.01) [H04B 2001/0425 (2013.01)] | 6 Claims |

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1. A communications device, comprising:
a transmitting path circuitry, configured to generate an output test signal according to a pre-distortion test signal;
a receiving path circuitry, configured to generate a feedback signal according to the output test signal;
a memory pre-distortion circuit, electrically coupled with transmitting path circuitry, wherein a set of pre-distortion coefficients of the memory pre-distortion circuit is calibrated according to the feedback signal;
a pre-equalizer circuit, electrically coupled with the transmitting path circuitry; and
a pre-equalization calculation circuit electrically coupled with the pre-equalizer circuit and configured to receive the set of pre-distortion coefficients for performing calculation on the set of pre-distortion coefficients for generating a calculation result, after calibration of the set of pre-distortion coefficients of the memory pre-distortion circuit is finished;
wherein after the pre-equalizer circuit is calibrated according to the calculation result, a transmission signal is outputted via the transmitting path circuitry after the transmission signal is processed by the pre-equalizer circuit and the memory pre-distortion circuit;
wherein a memory depth of the memory pre-distortion circuit is M, the memory pre-distortion circuit generates an output signal at a current time point according to an input signal at the current time point, input signals at M previous time points before the current time point and the set of pre-distortion coefficients, M is a positive integer, the set of pre-distortion coefficients comprise (M+1) first-order term coefficients, the (M+1) first-order term coefficients correspond to one weighting of the input signal at the current time point and M weightings of the input signals at the M previous time points, respectively, and the calculation performed on the set of pre-distortion coefficients by the pre-equalization calculating circuit comprises:
the pre-equalization calculating circuit performs time-domain-to-frequency-domain transform on the (M+1) first-order term coefficients to obtain (M+1) frequency transform results respectively corresponding to (M+1) frequencies;
the pre-equalization calculating circuit performs absolute value calculation on the (M+1) frequency transform results, respectively, to obtain (M+1) amplitude response values respectively corresponding to the (M+1) frequencies;
the pre-equalization calculating circuit performs reciprocal calculation on the (M+1) amplitude response values, respectively, to obtain (M+1) compensation gains respectively corresponding to the (M+1) frequencies; and
the pre-equalization calculating circuit performs frequency-domain-to-time-domain transform on the (M+1) compensation gains, to obtain (M+1) pre-equalization coefficients to be the calculation result, wherein the (M+1) pre-equalization coefficients makes a frequency response of the pre-equalizer circuit correspond to a frequency response formed by the (M+1) compensation gains.
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