US 12,489,443 B2
Low power driver scheme for on-chip and interposer based data transmission
Hari Bilash Dubey, Hyderabad (IN)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by XILINX, INC., San Jose, CA (US)
Filed on Oct. 12, 2022, as Appl. No. 17/964,762.
Prior Publication US 2024/0128974 A1, Apr. 18, 2024
Int. Cl. H03K 17/687 (2006.01)
CPC H03K 17/6872 (2013.01) 20 Claims
OG exemplary drawing
 
1. A method, comprising:
converting, in a voltage-controlled driver, standard voltage threshold parallel data to serialized non-return-to-zero data;
biasing, using p-bias generator circuitry of a bias generator, p-channel devices of the driver to control pull-down voltage levels;
biasing, using n-bias generator circuitry of the bias generator, n-channel devices of the driver to control pull-up voltage levels, wherein the pull-down voltage levels and the pull-up voltage levels, collectively, are configured to adjust a threshold switching voltage;
transmitting the serialized non-return-to-zero data on a transmission channel to a receiver-deserializer, the receiver-deserializer including a pre-amplifier and an amplifier; and
converting the serialized non-return-to-zero data to standard voltage threshold parallel data.