| CPC H01L 24/20 (2013.01) [H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/211 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01)] | 20 Claims |

|
1. A semiconductor package, comprising:
a semiconductor die having a first surface on which circuitry is formed and a second surface opposite the first surface; and
a mold compound, the second surface facing the mold compound, the mold compound physically contacting:
the semiconductor die;
a set of conductive vias exposed to a top surface of the semiconductor package and coupled to a metal layer in the package;
a set of first conductive members vertically aligned with the semiconductor die and exposed to the top surface of the semiconductor package; and
a set of second conductive members coupling at least some of the set of conductive vias to at least some of the set of first conductive members, the set of second conductive members exposed to the top surface of the semiconductor package.
|