US 12,489,037 B2
Semiconductor package substrate with a smooth groove straddling topside and sidewall
Bob Lee, New Taipei (TW); and Kim Hong Lucas Chai, Dresden (DE)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Jan. 31, 2023, as Appl. No. 18/104,278.
Prior Publication US 2024/0258210 A1, Aug. 1, 2024
Int. Cl. H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/49541 (2013.01) [H01L 21/56 (2013.01); H01L 23/3107 (2013.01); H01L 23/49513 (2013.01); H01L 23/49582 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 24/85 (2013.01); H01L 24/92 (2013.01); H01L 2224/26175 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/83855 (2013.01); H01L 2224/858 (2013.01); H01L 2224/92247 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a metallic substrate, the metallic substrate including a roughened surface;
a semiconductor die including bond pads; and
an adhesive between the roughened surface of a topside of the metallic substrate and the semiconductor die, therein bonding the semiconductor die to the metallic substrate, wherein the adhesive includes a resin,
wherein the metallic substrate further includes a groove about a perimeter of the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic substrate,
wherein the groove straddles the topside and a sidewall of the metallic substrate.