US 12,489,034 B2
Contact structure and method of forming the same
Yihuan Wang, Wuhan (CN); and Lina Miao, Wuhan (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Wuhan (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Oct. 20, 2021, as Appl. No. 17/451,497.
Application 17/451,497 is a continuation of application No. PCT/CN2021/115290, filed on Aug. 30, 2021.
Prior Publication US 2023/0067727 A1, Mar. 2, 2023
Int. Cl. H01L 27/115 (2017.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 27/11524 (2017.01)
CPC H01L 23/481 (2013.01) [H01L 21/76898 (2013.01); H01L 23/5226 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80001 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first die comprising:
a first stack of layers in a first region;
a second stack of layers in a second region, the first stack of layers having a smaller number of different layers than the second stack of layers;
a third stack of alternating gate layers and insulating layers in the second region, the first stack of layers being on a same side of the third stack with the second stack of layers;
a first conductive structure in the first region and extending along a first direction, the first conductive structure being on a same side of the first stack of layers with the third stack;
a second conductive structure in the first region, the second conductive structure and the third stack being disposed on opposite sides of the first stack of layers; and
a contact structure formed in the first region, the contact structure extending through the first stack of layers and being configured to conductively connect the first conductive structure with the second conductive structure.
 
15. A memory system, comprising:
a semiconductor device, comprising:
a die including a contact structure in a first region;
a first stack of layers in the first region;
a second stack of layers in a second region, the first stack of layers having a smaller number of different layers than the second stack of layers;
a third stack of alternating gate layers and insulating layers in the second region, the first stack of layers being on a same side of the third stack with the second stack of layers;
a first conductive structure in the first region and extending along a first direction, the first conductive structure being on a same side of the first stack of layers with the third stack; and
a second conductive structure in the first region, the second conductive structure and the third stack being disposed on opposite sides of the first stack of layers, wherein the contact structure is configured to conductively connect the first conductive structure with the second conductive structure; and
a controller configured to control operations of the semiconductor device, the controller being connected with the semiconductor device.