US 12,488,988 B2
Semiconductor device and method for manufacturing semiconductor device
Wei Dong, Hamamatsu (JP); and Kazuyoshi Hirose, Hamamatsu (JP)
Assigned to HAMAMATSU PHOTONICS K.K., Shizuoka (JP)
Filed by HAMAMATSU PHOTONICS K.K., Hamamatsu (JP)
Filed on Jan. 11, 2023, as Appl. No. 18/095,620.
Claims priority of application No. 2022-041487 (JP), filed on Mar. 16, 2022.
Prior Publication US 2023/0298897 A1, Sep. 21, 2023
Int. Cl. H01L 21/30 (2006.01); H01L 21/3065 (2006.01); H01L 21/3205 (2006.01); H10H 20/819 (2025.01); H10F 30/227 (2025.01); H10H 20/01 (2025.01)
CPC H01L 21/30655 (2013.01) [H01L 21/32053 (2013.01); H10H 20/819 (2025.01); H10F 30/227 (2025.01); H10H 20/034 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor layer having an uneven structure configured to include a recessed portion on one surface side thereof;
a first deposited film provided on the one surface of the semiconductor layer; and
a second deposited film provided on a bottom surface of the recessed portion,
wherein the recessed portion is provided with an enlarged portion having a cross-sectional area enlarged with respect to a portion on an opening portion side of the recessed portion, and
wherein a starting position of the enlarged portion is positioned between the opening portion of the recessed portion and the bottom surface of the recessed portion in a depth direction of the recessed portion.