| CPC G06F 12/10 (2013.01) | 20 Claims |
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1. A memory device, comprising:
a memory comprising a plurality of memory regions;
an address register configured to store a device address that at least one of another memory device different from the memory device or a host uses to access the memory, wherein the device address maps a first physical address designating a first memory region of the memory; and
an address translator configured to:
receive a first interrupt; and
in response to the first interrupt, convert a physical address of the memory mapped to the device address, from the first physical address to a second physical address designating a second memory region of the memory.
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