US 12,487,828 B2
Processor having switch instruction circuit
Christopher I. W. Norrie, Castro Valley, CA (US)
Assigned to Microchip Technology Inc., Chandler, AZ (US)
Filed by Microchip Technology Inc., Chandler, AZ (US)
Filed on Dec. 8, 2023, as Appl. No. 18/534,203.
Claims priority of provisional application 63/468,462, filed on May 23, 2023.
Prior Publication US 2024/0394062 A1, Nov. 28, 2024
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/3802 (2013.01) [G06F 9/30054 (2013.01); G06F 9/30061 (2013.01); G06F 9/3016 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A processor comprising:
an instruction fetch circuit to fetch instructions, the instruction fetch circuit having an input and an output;
a decode circuit to decode the fetched instructions, the decode circuit having a first input, a second input, and an output, wherein the decode circuit first input is coupled to the instruction fetch circuit output to receive the fetched instructions;
an execution circuit to execute the decoded fetched instructions, the execution circuit having an input, wherein the execution circuit input is coupled to the decode circuit output to receive the decoded fetched instructions; and
a switch instruction circuit (SIC) to detect and execute switch instructions of the fetched instructions, the SIC having an input and an output, wherein the SIC input is coupled to the instruction fetch circuit output to receive the fetched instructions, wherein the SIC output is coupled to the decode circuit second input and the instruction fetch circuit input.