US 12,487,677 B2
Digitally assisted sensor recording circuit with continuous offset cancellation
Nader Fathy, La Jolla, CA (US); and Patrick Mercier, La Jolla, CA (US)
Assigned to The Regents of the University of California, Oakland, CA (US)
Appl. No. 18/694,280
Filed by THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US)
PCT Filed Sep. 23, 2022, PCT No. PCT/US2022/044505
§ 371(c)(1), (2) Date Mar. 21, 2024,
PCT Pub. No. WO2023/049325, PCT Pub. Date Mar. 30, 2023.
Claims priority of provisional application 63/247,889, filed on Sep. 24, 2021.
Prior Publication US 2025/0138633 A1, May 1, 2025
Int. Cl. G06F 3/01 (2006.01); H03M 1/66 (2006.01)
CPC G06F 3/015 (2013.01) [H03M 1/662 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An integrated digitally assisted neural recording system comprising:
an analog multiplexer structured to receive N-channels and to multiplex the N-Channels into a single neural amplifier;
an analog to digital converter configured to convert a signal from the neural amplifier;
a demultiplexer configured to separate a digital output of the analog to digital converter back into the N-channels; and
a feedback loop from the demultiplexer to the neural amplifier, the feedback loop being configured to cancel electrode offset voltage by generating electrode offset voltage samples and adding delay to align each electrode offset voltage sample to be subtracted at the neural amplifier in the analog domain, wherein the feedback loop comprises an adaptive filter that initially sets at a gain value that saturates the feedback loop and automatically decreases gain to a largest possible value that guarantees electrode offset voltage cancellation.