US 12,487,628 B2
Storage array power throttling
Christopher Dion, Marlborough, MA (US); Vasudevan Subramanian, Chapel Hill, NC (US); Philippe Armangau, Kalispell, MT (US); and Rustem Rafikov, Hopkinton, MA (US)
Assigned to DELL PRODUCTS, L.P., Round Rock, TX (US)
Filed by Dell Products, L.P., Round Rock, TX (US)
Filed on Sep. 26, 2023, as Appl. No. 18/474,662.
Prior Publication US 2025/0103089 A1, Mar. 27, 2025
Int. Cl. G06F 1/00 (2006.01); G06F 1/08 (2006.01); G06F 1/3296 (2019.01)
CPC G06F 1/08 (2013.01) [G06F 1/3296 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system, comprising:
at least one processor, and
at least one memory coupled to the at least one processor and having instructions stored thereon, wherein, in response to the at least one processor, the instructions facilitate performance of operations, comprising:
monitoring demand data representative of an operational demand of a collection of central processing units (CPUs) located in a system, wherein the operational demand relates to at least one workload to be processed by the system, wherein the collection of CPUs comprises a first CPU and a second CPU, and wherein the system is prohibited from adjusting operation of the second CPU from a specified normal operating condition;
determining whether a first operational demand represented by first operational demand data is below a performance threshold; and
in response to a determination that the first operational demand is below the performance threshold, throttling operation of the first CPU, wherein the throttling of the operation of the first CPU comprises reducing a clock speed of the first CPU from a normal clock speed to a minimal clock speed, wherein the minimal clock speed has a first frequency less than a second frequency corresponding to the normal clock speed.