US 12,156,486 B2
Horizontal RRAM device and architecture for variability reduction
Timothy Mathew Philip, Albany, NY (US); Christopher J. Penny, Saratoga Springs, NY (US); Nicholas Anthony Lanzillo, Wynantskill, NY (US); Youngseok Kim, Upper Saddle River, NJ (US); and Lawrence A. Clevenger, Saratoga Springs, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Dec. 2, 2020, as Appl. No. 17/247,155.
Prior Publication US 2022/0173313 A1, Jun. 2, 2022
Int. Cl. H10N 70/00 (2023.01); H10N 70/20 (2023.01)
CPC H10N 70/253 (2023.02) [H10N 70/011 (2023.02); H10N 70/823 (2023.02); H10N 70/841 (2023.02); H10N 70/8833 (2023.02)] 17 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a dielectric layer located between a first electrode and a second electrode;
a third electrode located on the dielectric layer between the first electrode and the second electrode, wherein the first electrode is adjacent to a first side of the dielectric layer, and the second electrode is adjacent to a second side of the dielectric layer, wherein the third electrode is adjacent to a third side of the dielectric layer; and
a first layer is in direct contact with multiple surfaces of the third electrode, wherein the first layer is in direct contact with the first electrode and the second electrode, and wherein the third electrode is comprised of a second layer, wherein the top surface of the first layer and second layer is planar with a top surface of the first electrode and a top surface of the second electrode.