	US 12,156,404 B2
	Semiconductor device and manufacturing method thereof
Takashi Izumi, Yokkaichi (JP); Akitsugu Hatazaki, Yokkaichi (JP); and Shingo Nakajima, Yokkaichi (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Dec. 6, 2021, as Appl. No. 17/457,710.
Claims priority of application No. 2021-088745 (JP), filed on May 26, 2021.
Prior Publication US 2022/0384466 A1, Dec. 1, 2022
Int. Cl. H10B 41/40 (2023.01); H01L 23/522 (2006.01); H10B 41/10 (2023.01); H10B 41/20 (2023.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01); H10B 43/40 (2023.01)

CPC H10B 41/40 (2023.02) [H01L 23/5228 (2013.01); H10B 41/10 (2023.02); H10B 41/20 (2023.02); H10B 43/10 (2023.02); H10B 43/20 (2023.02); H10B 43/40 (2023.02)]

14 Claims

1. A semiconductor device, comprising:

a semiconductor substrate;

a peripheral circuit provided on the semiconductor substrate; and

a stacked body including a memory cell array above the peripheral circuit;

wherein the peripheral circuit includes:

a metal film including silicon;

a silicide film stacked on the metal film; and

a barrier metal film stacked on the silicide film.