US 12,154,928 B2
Image sensor
Young-sun Oh, Yongin-si (KR); and Hee-sang Kwon, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 8, 2022, as Appl. No. 18/077,696.
Application 18/077,696 is a continuation of application No. 16/895,283, filed on Jun. 8, 2020, granted, now 11,527,567.
Application 16/895,283 is a continuation of application No. 16/410,612, filed on May 13, 2019, granted, now 11,205,672, issued on Dec. 21, 2021.
Application 16/410,612 is a continuation of application No. 15/698,860, filed on Sep. 8, 2017, granted, now 10,332,925, issued on Jun. 25, 2019.
Claims priority of application No. 10-2017-0004169 (KR), filed on Jan. 11, 2017.
Prior Publication US 2023/0106108 A1, Apr. 6, 2023
Int. Cl. H01L 27/146 (2006.01); H04N 25/63 (2023.01)
CPC H01L 27/1463 (2013.01) [H01L 27/14605 (2013.01); H01L 27/14636 (2013.01); H01L 27/1464 (2013.01); H01L 27/14612 (2013.01); H01L 27/14623 (2013.01); H01L 27/14689 (2013.01); H04N 25/63 (2023.01)] 20 Claims
OG exemplary drawing
 
1. An image sensor comprising:
a substrate including a first surface and a second surface, the substrate including a plurality of pixel regions, the plurality of pixel regions including a pair of dummy pixel regions disposed adjacent to each other, and each of the pair of dummy pixel regions comprising a photodiode converter;
a pixel separation structure between two adjacent pixel regions among the plurality of pixel regions, the pixel separation structure being disposed in a pixel separation trench extending from the second surface of the substrate toward the first surface of the substrate, the pixel separation structure including an insulation layer and a conductive layer, the insulation layer being disposed on an inner wall of the pixel separation trench, the conductive layer being disposed on the insulation layer to fill an inside of the pixel separation trench;
a plurality of transistors provided in the plurality of pixel regions, wherein the plurality of transistors are offset from the pair of dummy pixel regions;
a transfer gate of one of the plurality of transistors on the first surface of the substrate;
a pixel separation contact electrically connected to the pixel separation structure and being configured to apply a negative bias to the pixel separation structure; and
a micro lens on the second surface of the substrate,
wherein a bottom surface of the pixel separation structure between the pair of dummy pixel regions is between the first surface of the substrate and the second surface of the substrate, and
wherein, along a vertical direction, the photodiode converter of each of the pair of dummy pixel regions extends between the substrate and the pixel separation contact.