| CPC H01L 24/20 (2013.01) [H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/29 (2013.01); H01L 25/0655 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/13083 (2013.01); H01L 2224/29008 (2013.01); H01L 2224/29009 (2013.01); H01L 2924/14 (2013.01)] | 15 Claims |
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1. An integrated circuit device comprising:
a wiring structure including a plurality of wiring layers, a plurality of via plugs, and a first inter-wiring insulating layer configured to surround the wiring structure on a substrate;
a second inter-wiring insulating layer on the first inter-wiring insulating layer;
a plurality of redistribution via plugs connected to the wiring structure through the second inter-wiring insulating layer;
a plurality of redistribution patterns including a plurality of pad patterns and a plurality of dummy patterns on the second inter-wiring insulating layer, the plurality of dummy patterns being electrically isolated from each other; and
a cover insulating layer configured to cover a portion of the plurality of redistribution patterns,
wherein each of the plurality of pad patterns extend with a first length and a first width, and
wherein all of the plurality of dummy patterns on the second inter-wiring insulating layer extend with a second length greater than the first length and with a second width.
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