preparing a wafer having a plurality of semiconductor chips thereon, wherein each of the plurality of semiconductor chips has a non-active surface, the non-active surface divided into a first region and a second region;

forming a mask pattern on the wafer such that the second region of each of the plurality of semiconductor chips is covered and the first region of each of the plurality of semiconductor chips is exposed;

forming a first heat dissipation layer on the first region using the mask pattern, the first heat dissipation layer having a first vertical thermal conductivity in a vertical direction perpendicular to the non-active surface and a first horizontal thermal conductivity in a horizontal direction parallel to the non-active surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity;

removing the mask pattern from the first heat dissipation layer such that the second region is exposed in each of the plurality of semiconductor chips;

forming a second heat dissipation layer including a vertical pattern on the second region of each of the plurality of semiconductor chips, the vertical pattern having a second vertical thermal conductivity that is greater than the first vertical thermal conductivity of the first heat dissipation layer; and

cutting the wafer into the plurality of the semiconductor chips.