| CPC G09G 3/20 (2013.01) [G09G 3/3233 (2013.01); G09G 2310/027 (2013.01); G09G 2310/0275 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0223 (2013.01); G09G 2330/021 (2013.01)] | 17 Claims |
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1. A source driver comprising:
a buffer configured to output a plurality of data voltages based on bias currents in order to drive a plurality of pixels connected to a data line; and
a bias control circuit configured to adjust intensities of the bias currents according to positions of respective pixels connected to the data line, wherein
the bias control circuit is configured to:
control intensity of a bias current for a first pixel connected to a first gate line and a first data line such that it is different from i) intensity of a bias current for a second pixel connected to the first gate line and a second data line that is adjacent to the first data line and ii) intensity of a bias current for a third pixel connected to the first gate line and a third data line that is adjacent to the first data line, and
control the intensity of the bias current for the first pixel such that the intensity of the bias current for the first pixel in a first frame is different from the intensity of the bias current for the first pixel in second and third frames, wherein the first frame is between the second and third frames.
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