US 12,154,224 B2
Fine grained replay control in binning hardware
Jan H. Achrenius, Helsinki (FI); Kiia Kallio, Inkoo As (FI); Miikka Kangasluoma, Ulvila (FI); Ruijin Wu, San Diego, CA (US); and Anirudh R. Acharya, San Diego, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Sep. 25, 2020, as Appl. No. 17/033,023.
Claims priority of provisional application 63/042,399, filed on Jun. 22, 2020.
Prior Publication US 2021/0398349 A1, Dec. 23, 2021
Int. Cl. G06T 17/10 (2006.01); G06T 1/20 (2006.01); G06T 15/00 (2011.01)
CPC G06T 17/10 (2013.01) [G06T 1/20 (2013.01); G06T 15/005 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor configured to render a plurality of primitives of a frame, the processor comprising:
circuitry configured to render the plurality of primitives of the frame, the plurality of primitives divided into a plurality of batches of primitives, the frame divided into a plurality of bins;
wherein for at least one batch of the plurality of batches the rendering includes:
for each of the plurality of bins, rendering primitives of a first sub-batch rasterizing to that bin in a first pass, and
rendering primitives of a second sub-batch rasterizing to that bin in a second pass.