CPC G06F 9/45558 (2013.01) [G06F 9/4401 (2013.01); G06F 9/5077 (2013.01); G06F 21/44 (2013.01); G06F 2009/45587 (2013.01)] | 21 Claims |
1. A system comprising:
a memory; and
a hardware processor coupled to the memory and configured to:
execute a hypervisor having a first portion and a second portion, wherein the first portion of the hypervisor executes at a first exception level and is able to access data of a virtual machine in the hardware processor and the memory, and wherein the second portion of the hypervisor executes at a second exception level and accesses the data of the virtual machine in the hardware processor and the memory using a first page table that translates a host virtual address to a virtualized host physical address and a second page table that translates the virtualized host physical address to a host physical address, wherein the second page table is controlled by the first portion of the hypervisor; and
unmapping physical memory from the second page table by the first portion of the hypervisor to prevent the second portion of the hypervisor from accessing the physical memory.
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