US 12,153,867 B2
Reduced-power dynamic data circuits with wide-band energy recovery
Ignatius Bezzam, Los Altos, CA (US)
Assigned to REZONENT CORPORATION, Los Altos, CA (US)
Filed by REZONENT CORPORATION, Los Altos, CA (US)
Filed on May 31, 2023, as Appl. No. 18/204,230.
Application 18/204,230 is a division of application No. 17/317,500, filed on May 11, 2021, granted, now 11,763,055.
Prior Publication US 2023/0306174 A1, Sep. 28, 2023
Int. Cl. G06F 30/373 (2020.01); G06F 30/327 (2020.01); G06F 30/35 (2020.01); G06F 30/36 (2020.01); G06F 119/06 (2020.01); H02M 7/48 (2007.01); H03K 5/15 (2006.01); H03K 19/00 (2006.01); H03K 19/096 (2006.01)
CPC G06F 30/373 (2020.01) [G06F 30/327 (2020.01); G06F 30/35 (2020.01); G06F 30/36 (2020.01); H03K 19/0019 (2013.01); H03K 19/0963 (2013.01); H03K 19/0966 (2013.01); G06F 2119/06 (2020.01); H02M 7/4826 (2013.01); H02P 2201/05 (2013.01); H03K 5/15 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A digital logic driver comprising:
an output node;
a first load capacitance of the output node; and
a resonant inductor intermittently coupled to the first load capacitance to resonant during a resonant mode, the resonant inductor has a reduced size due to being shared with multiple digital logic drivers, wherein the digital logic driver reuses electrical energy at several load capacitances including the first load capacitance and a second load capacitance, as part of a signal path of the digital logic driver without interfering with the signal path of the output node, wherein the resonant inductor is intermittently connected to at least one of the load capacitances for an optimum duration such that as the output node transitions from a logic high state to a logic low state and magnetic energy is established in the resonant inductor and stored in a power supply, and then recovered by way of the resonant inductor to help transition the output node back to the logic high state from the logic low state.