| CPC G06F 3/0412 (2013.01) [G06F 3/0416 (2013.01); G06F 3/0443 (2019.05); H10K 59/1201 (2023.02); H10K 59/122 (2023.02); H10K 59/124 (2023.02); H10K 59/40 (2023.02)] | 19 Claims |
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1. A display panel, comprising:
a transistor disposed over a substrate;
a first planarization layer and a second planarization layer disposed over the transistor;
an anode electrode disposed on the second planarization layer and electrically connected to the transistor through an anode contact hole;
an emission layer and a cathode electrode disposed on the anode electrode;
a touch buffer layer disposed to cover the anode electrode;
a touch electrode including an overlap area overlapping a portion of the anode electrode in a non-light emitting area on the touch buffer layer; and
a touch line disposed under the touch electrode and electrically connected to the touch electrode through a touch contact hole,
wherein the touch buffer layer and the touch electrode are between the anode electrode and the cathode electrode.
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