US 12,484,459 B2
Planarization-less phase change material switch
Harry-Hak-Lay Chuang, Zhubei (TW); Chia Wen Liang, Zhubei (TW); Chang-Chih Huang, Taichung (TW); Han-Yu Chen, Zhubei (TW); Kuo-Chyuan Tzeng, Chu-Pei (TW); and Tsung-Hao Yeh, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Jun. 1, 2022, as Appl. No. 17/829,562.
Prior Publication US 2023/0397511 A1, Dec. 7, 2023
Int. Cl. H10N 19/00 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01); H10N 79/00 (2023.01)
CPC H10N 70/231 (2023.02) [H10N 70/063 (2023.02); H10N 70/068 (2023.02); H10N 70/841 (2023.02); H10N 70/8613 (2023.02); H10N 79/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a dielectric isolation layer having a top surface and located over a substrate;
a heater line contacting a first area of the top surface;
a phase change material (PCM) line comprising a middle portion that overlies the heater line, a first end portion adjoined to a first side of the middle portion and contacting a second area of the top surface, and a second end portion adjoined to a second side of the middle portion and contacting a third area of the top surface;
a first electrode contacting a sidewall of the first end portion of the PCM line and contacting a fourth area of the top surface; and
a second electrode contacting a sidewall of the second end portion of the PCM line and contacting a fifth area of the top surface.
 
8. A semiconductor structure comprising:
a dielectric isolation layer having a top surface and located over a substrate;
a heater line contacting a first area of the top surface of the dielectric isolation layer;
a phase change material (PCM) line overlying a heater-capping dielectric plate;
a first conductive barrier plate contacting a first segment of a top surface of the PCM line;
a second conductive barrier plate contacting a second segment of the top surface of the PCM line;
a first electrode contacting a top surface of the first conductive barrier plate;
a second electrode contacting a top surface of the second conductive barrier plate; and
a heater-capping dielectric plate overlying the heater line and underlying the PCM line, wherein sidewalls of the PCM line are vertically coincident with sidewalls of the heater line and are vertically coincident with sidewall of the heater-capping dielectric plate.
 
15. A semiconductor structure comprising:
a dielectric isolation layer having a top surface and located over a substrate;
a heater line contacting a first area of the top surface;
a phase change material (PCM) line comprising a middle portion that overlies the heater line, a first end portion adjoined to a first side of the middle portion and contacting a second area of the top surface, and a second end portion adjoined to a second side of the middle portion and contacting a third area of the top surface; and
a dielectric spacer laterally surrounding the heater line, wherein:
a bottom surface of the dielectric spacer has an inner periphery that coincides with a periphery of a bottom surface of the heater line; and
an outer periphery of the bottom surface of the dielectric spacer is laterally offset from the inner periphery by a uniform lateral offset distance.