| CPC H10K 59/1315 (2023.02) [H10K 59/65 (2023.02)] | 17 Claims |

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1. An array substrate comprising a hole area and a display area surrounding the hole area, wherein the array substrate comprises:
a plurality of pixel circuits distributed in an array in the display area;
a plurality of first signal lines electrically connected to the pixel circuits and extending along a first direction, wherein the plurality of first signal lines comprise a plurality of first-type signal lines and a plurality of second-type signal lines, and each of the second-type signal lines comprises a first segment and a second segment separated by the hole area;
a plurality of first connection signal lines, wherein at least a number of the plurality of first connection signal lines is located in the display area, each of the first connection signal lines comprises a first connection segment, a second connection segment and a third connection segment connected to each other, the first connection segment is electrically connected to the first segment, the third connection segment is electrically connected to the second segment, the second connection segment is connected between the first connection segment and the third connection segment, both the first connection segment and the third connection segment extend along a second direction, and the second connection segment extends along the first direction;
a plurality of first compensation signal lines, wherein the plurality of first compensation signal lines are located in the display area, the plurality of first compensation signal lines comprise a plurality of first-type compensation signal lines and a plurality of second-type compensation signal lines, the first-type compensation signal lines extend along the first direction, and the second-type compensation signal lines extend along the second direction;
wherein an orthographic projection of the first connection signal lines on a plane where the array substrate is located does not overlap with an orthographic projection of the pixel circuits on the plane, an orthographic projection of the first compensation signal lines on the plane does not overlap with the orthographic projection of the pixel circuits on the plane, the first-type compensation signal lines are configured to compensate an uneven density of the first connection signal lines in the display area in the first direction, and the second-type compensation signal lines are configured to compensate an uneven density of the first connection signal lines in the display area in the second direction.
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