US 12,484,396 B2
Array substrate and display device
Rong Wang, Beijing (CN); Donghui Tian, Beijing (CN); Fan He, Beijing (CN); Xiangdan Dong, Beijing (CN); and Yu Wang, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., Beijing (CN)
Appl. No. 17/755,459
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Apr. 30, 2021, PCT No. PCT/CN2021/091587
§ 371(c)(1), (2) Date Apr. 29, 2022,
PCT Pub. No. WO2022/227031, PCT Pub. Date Nov. 3, 2022.
Prior Publication US 2024/0155887 A1, May 9, 2024
Int. Cl. H10K 59/131 (2023.01); G09G 3/3225 (2016.01)
CPC H10K 59/131 (2023.02) [G09G 3/3225 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a base substrate, comprising a display region and a bonding region at a periphery of the display region;
a plurality of first pixel driving circuits on the base substrate;
M first data lines; and
M first leads,
wherein the display region comprises a first region and a second region at a side of the first region, and the plurality of first pixel driving circuits are in the second region,
the plurality of first pixel driving circuits are arranged in an array along a first direction and a second direction to constitute a plurality of first pixel driving columns arranged along the first direction, the first region and the second region are arranged in the first direction,
the M first data lines are configured to provide data signals to the plurality of first pixel driving columns, the M first leads are respectively connected with the M first data lines, pass through the first region from the second region and extend to the bonding region, and M is a positive integer greater than or equal to 2,
the array substrate further comprises a plurality of second pixel driving circuits in the first region, each of the first leads comprises: a first sub-lead portion extending from the second region to the first region along the first direction; and a second sub-lead portion extending from the first region to the bonding region along the second direction,
the plurality of first pixel driving circuits are arranged in an array along the first direction and the second direction to constitute a plurality of first pixel driving rows arranged along the second direction,
the plurality of second pixel driving circuits are arranged in an array along the first direction and the second direction to constitute a plurality of second pixel driving columns arranged along the first direction and a plurality of second pixel driving rows arranged along the second direction,
a first interval is formed between two of the first pixel driving rows that are adjacent in the second direction, and a second interval is formed between two of the second pixel driving columns that are adjacent in the first direction, and an orthographic projection of each of the first leads on the base substrate at least partially overlaps with an orthographic projection of the first interval and an orthographic projection of the second interval on the base substrate,
an orthographic projection of the first sub-lead portion on the base substrate at least partially overlaps with the orthographic projection of the first interval on the base substrate,
an orthographic projection of the second sub-lead portion on the base substrate at least partially overlaps with the orthographic projection of the second interval on the base substrate,
wherein, in the second direction, the first region and the second region are edge parts of the display region, the display region comprises a third region, the third region is on a side of the first region away from the bonding region, and the array substrate further comprises a third pixel driving circuit which is in the third region,
a size of each of the second pixel driving circuits in the first direction is smaller than a size of the third pixel driving circuit in the first direction, so as to form the first interval, and a size of each of the first pixel driving circuits in the second direction is smaller than a size of the third pixel driving circuit in the second direction, so as to form the second interval.