| CPC H10H 20/857 (2025.01) [G09F 9/33 (2013.01); G09G 3/2003 (2013.01); G09G 3/32 (2013.01); H01L 25/0753 (2013.01); H01L 25/167 (2013.01); H10H 20/01 (2025.01); H10H 20/8312 (2025.01); H10H 29/142 (2025.01); G09G 2300/0842 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0693 (2013.01); G09G 2360/145 (2013.01); H10H 20/032 (2025.01); H10H 20/0364 (2025.01)] | 17 Claims |

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1. An array substrate, comprising:
a base substrate;
a first electrode layer, a first insulating layer, and a second electrode layer arranged sequentially on the base substrate,
a light-emitting element group located on the second electrode layer, wherein the light-emitting element group comprises one or more light-emitting elements, each light-emitting element comprises a first electrode, a light emitting layer, and a second electrode, wherein the first electrode is coupled to the first electrode layer, and the second electrode is coupled to the second electrode layer, so as to drive the light emitting layer to emit light;
wherein the array substrate further comprises a planarization layer located at a side of the light-emitting element group away from the base substrate; and a driving circuit layer arranged on the planarization layer, wherein the driving circuit layer comprises a first switch transistor configured to control the first electrode to be electrically connected to, or electrically disconnected from, the first electrode layer, a first electrode of the first switch transistor is coupled to a first electrode of the light-emitting element group via a first through hole, and a second electrode of the first switch transistor is coupled to the first electrode layer via a second through hole;
wherein the array substrate further comprises a second insulating layer located on the planarization layer, wherein the first through hole penetrates the second insulating layer and a part of the planarization layer, and the second through hole penetrates the second electrode layer.
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