| CPC H10H 20/84 (2025.01) [H01L 21/30621 (2013.01); H10H 20/01335 (2025.01); H10H 20/8215 (2025.01); H10H 20/825 (2025.01)] | 13 Claims |

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1. A method, comprising:
growing one or more III-nitride semiconductor layers on a substrate;
performing a plasma-based dry etching of the one or more III-nitride semiconductor layers to define a mesa during fabrication of a device comprising a micro-LED, wherein the plasma-based dry etching introduces defects and surface states on one or more sidewalls of the mesa, the defects and surface states serve as charge carrier traps, and the defects and surface states increase leakage current of the device and a probability of non-radiative recombination in the device;
performing one or more chemical treatments to remove damage from the one or more sidewalls of the mesa resulting from the plasma-based dry etching, wherein the one or more chemical treatments include treating the one or more sidewalls of the mesa using potassium hydroxide (KOH); and
depositing dielectric materials comprised of silicon dioxide (SiO2) on the one or more sidewalls of the mesa using atomic layer deposition (ALD) to passivate the one or more sidewalls of the mesa, and to bury the defects and surface states, in order to lower the leakage current of the device generated by the plasma-based dry etching;
resulting in the micro-LED having a peak external quantum efficiency (EQE) greater than 20% for dimensions from 10×10 μm2 to 20×20 μm2.
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