US 12,484,310 B2
Semiconductor device structure and methods of forming the same
Kai-Fang Cheng, Taoyuan (TW); Kuang-Wei Yang, Hsinchu (TW); Cherng-Shiaw Tsai, New Taipei (TW); and Hsiaokang Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jul. 27, 2022, as Appl. No. 17/874,533.
Application 17/874,533 is a division of application No. 17/151,345, filed on Jan. 18, 2021, granted, now 11,923,357.
Prior Publication US 2022/0359499 A1, Nov. 10, 2022
Int. Cl. H01L 23/14 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01); H10D 88/00 (2025.01)
CPC H10D 88/00 (2025.01) [H01L 23/147 (2013.01); H01L 23/5385 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming an interfacial structure, comprising:
forming a first structure over an entire wafer, comprising:
depositing a dielectric layer over the entire wafer;
forming an opening in the dielectric layer;
forming a first conductive feature in the opening and over the dielectric layer;
performing a first planarization process to remove a portion of the first conductive feature formed on the dielectric layer, wherein the dielectric layer is exposed;
recessing the dielectric layer; and
forming a first thermal conductive layer on the recessed dielectric layer, wherein the first thermal conductive layer extends from one end of the recessed dielectric layer to an opposite end of the recessed dielectric layer, a surface of the first thermal conductive layer and a surface of the first conductive feature are substantially co-planar, and the first thermal conductive layer consists of graphite;
forming a second structure; and
bonding the second structure to the first structure.