US 12,484,276 B2
Replacement structures
Kuei-Yu Kao, Hsinchu (TW); Shih-Yao Lin, Taipei (TW); Chen-Ping Chen, Yilan (TW); Chih-Chung Chiu, Hsinchu (TW); Chih-Han Lin, Hsinchu (TW); Ming-Ching Chang, Hsinchu (TW); and Chao-Cheng Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 11, 2022, as Appl. No. 17/811,739.
Prior Publication US 2024/0014293 A1, Jan. 11, 2024
Int. Cl. H10D 64/01 (2025.01); H01L 21/762 (2006.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01)
CPC H10D 64/017 (2025.01) [H01L 21/76224 (2013.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/01 (2025.01); H10D 64/018 (2025.01); H10D 64/021 (2025.01); H10D 84/0128 (2025.01); H10D 84/0147 (2025.01); H10D 84/0151 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming an etch stop layer over a semiconductor material having a top surface in a horizontal plane;
forming a dummy structure over the etch stop layer, wherein the dummy structure has a dummy sidewall, wherein the dummy structure lies directly over a first region of the etch stop layer and over a first region of the semiconductor material under the first region of the etch stop layer, and wherein the dummy structure does not lie directly over a second region of the etch stop layer or over a second region of the semiconductor material under the second region of the etch stop layer, and
removing the second region of the etch stop layer and forming a side edge of the first region of the etch stop layer, wherein the side edge forms an angle of from 90 to 100 degrees with the horizontal plane.