	US 12,484,261 B2
	Semiconductor devices
Jinhong Park, Seoul (KR); Jiwan Koo, Suwon-si (KR); Maksim Andreev, Suwon-si (KR); Sahwan Hong, Suwon-si (KR); Seunghwan Seo, Incheon (KR); Juhee Lee, Ansan-si (KR); and Bongjin Kuh, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR); and RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 16, 2022, as Appl. No. 17/888,562.
Claims priority of application No. 10-2022-0031441 (KR), filed on Mar. 14, 2022.
Prior Publication US 2023/0290870 A1, Sep. 14, 2023
Int. Cl. H01L 29/76 (2006.01); H01L 21/02 (2006.01); H01L 29/24 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H10D 30/67 (2025.01); H10D 48/36 (2025.01); H10D 62/80 (2025.01); H10D 99/00 (2025.01)

CPC H10D 48/362 (2025.01) [H01L 21/02568 (2013.01); H10D 30/6713 (2025.01); H10D 30/6729 (2025.01); H10D 30/6757 (2025.01); H10D 62/80 (2025.01); H10D 99/00 (2025.01)]

19 Claims

1. A semiconductor device, comprising:

a channel on a substrate, the channel including a 2-dimensional material;

a gate insulating layer on a first portion of the channel;

a gate electrode on a portion of the gate insulating layer;

first and second contact patterns on second portions of the channel, respectively, each of the first and second contact patterns including a 2-dimensional material having an intercalation material disposed therein; and

first and second source/drain electrodes on the first and second contact patterns, respectively, each of the first and second source/drain electrodes including a metal,

wherein the gate insulating layer covers a lower surface and a sidewall of the gate electrode.