| CPC H10D 12/461 (2025.01) [H10D 30/475 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01)] | 16 Claims |

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1. An insulated gate bipolar transistor, comprising:
a P-type group III-V nitride compound layer;
an N-type group III-V nitride compound layer contacting a side of the P-type group III-V nitride compound layer;
a high electron mobility transistor (HEMT) disposed on the N-type group III-V nitride compound layer, wherein the HEMT comprises:
a first group III-V nitride compound layer disposed on the N-type group III-V nitride compound layer;
a second group III-V nitride compound layer disposed on the first group III-V nitride compound layer;
a source embedded within the second group III-V nitride compound layer and the first group III-V nitride compound layer, wherein the source comprises an N-type group III-V nitride compound body and a metal contact;
a drain contacting another side of the P-type group III-V nitride compound layer; and
a gate disposed on the second group III-V nitride compound layer.
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