| CPC H10B 41/30 (2023.02) [H10B 41/60 (2023.02)] | 9 Claims |

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1. A method of forming an electrically erasable programmable read only memory (EEPROM) cell, comprising:
sequentially forming a floating gate layer and a control gate stacked on a substrate;
forming a first spacer on the floating gate layer and at a first side of the control gate;
removing an exposed top of the floating gate layer to form a pre-floating gate layer, wherein the pre-floating gate layer has a stepped side part;
forming a second spacer on the pre-floating gate layer and on the first side of the control gate; and
removing the exposed part of the pre-floating gate layer, so as to form a floating gate, wherein the floating gate has a two-step side part.
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