US 12,484,061 B2
Hardware assisted channel switch time enhancement
Kamal Agarwal Singhal, Bengaluru (IN); Bijoy Bhukania, Bengaluru (IN); Venkateswara Rao Kanchi, Bengaluru (IN); Varaprasad Javvadi, Bengaluru (IN); Swetank Ambar, Bengaluru (IN); and Srikanth Gummadi, Bangalore (IN)
Assigned to Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed by Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed on Dec. 7, 2022, as Appl. No. 18/077,178.
Prior Publication US 2024/0196401 A1, Jun. 13, 2024
Int. Cl. H04W 72/20 (2023.01); H04L 69/323 (2022.01)
CPC H04W 72/20 (2023.01) [H04L 69/323 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A controller, comprising:
a memory that stores instructions; and
controller circuitry coupled to the memory, wherein executing the instructions causes the controller circuitry to:
instruct a machine access control (MAC) layer to copy a first set of parameters and generate a second set of parameters based on the copied first set of parameters,
pre-program the second set of parameters for each of a first channel and a second channel, and
in response to receiving a command to switch from the first channel to the second channel, instruct the MAC layer to select the second set of parameters that is pre-programmed for the second channel.