US 12,483,130 B2
Controller of power conversion circuit and operating method thereof
Wei-Hsiu Hung, Zhubei (TW); Yen-Chih Lin, Zhubei (TW); and Chen-Xiu Lin, Zhubei (TW)
Assigned to UPI SEMICONDUCTOR CORP., Zhubei (TW)
Filed by uPI semiconductor corp., Zhubei (TW)
Filed on Apr. 25, 2023, as Appl. No. 18/306,374.
Claims priority of application No. 111126527 (TW), filed on Jul. 14, 2022.
Prior Publication US 2024/0022168 A1, Jan. 18, 2024
Int. Cl. H02M 3/157 (2006.01); H02M 1/00 (2006.01)
CPC H02M 3/157 (2013.01) [H02M 1/0009 (2021.05); H02M 1/0012 (2021.05); H02M 1/0025 (2021.05)] 4 Claims
OG exemplary drawing
 
1. A controller of a power conversion circuit, coupled to a plurality of output stage circuits and generating a plurality of pulse width modulation (PWM) signals to control the output stage circuits respectively, so that the power conversion circuit provides an output voltage and a load current to an output terminal, the controller comprising:
a sensing circuit, coupled to the output stage circuits and configured to generate a current sensing signal related to the load current;
a first comparison circuit, coupled to the sensing circuit and configured to compare the current sensing signal and a default value to generate a first comparison result, wherein the default value represents a current threshold value;
a PWM generation circuit, coupled to the output stage circuits; and
a control loop, coupled between the output terminal and the PWM generation circuit and also coupled to the first comparison circuit, the control loop being configured to generate a trigger signal according to a reference voltage and the output voltage to control the PWM generation circuit to generate the PWM signals,
wherein when the first comparison result indicates that the load current exceeds the current threshold value, the first comparison result makes the control loop to stop providing the trigger signal to the PWM generation circuit temporarily to delay the generation of the PWM signals, the control loop comprises:
a ramp signal generation circuit, configured to generate a ramp signal and receive the trigger signal to reset the ramp signal;
an error amplifier, coupled to the output terminal and configured to receive the reference voltage and a feedback voltage related to the output voltage to generate an error signal;
a compensation circuit, coupled to the error amplifier and configured to receive the error signal to generate a compensation signal; and
a second comparison circuit, coupled to the ramp signal generation circuit, the compensation circuit and the PWM generation circuit respectively and configured to compare the ramp signal and the compensation signal to generate a second comparison result for generating the trigger signal.