US 12,482,801 B2
Semiconductor package
Manho Lee, Hwaseong-si (KR); Keung Beum Kim, Hwaseong-si (KR); and Kyung Suk Oh, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Nov. 28, 2022, as Appl. No. 17/994,880.
Claims priority of application No. 10-2022-0019527 (KR), filed on Feb. 15, 2022.
Prior Publication US 2023/0260983 A1, Aug. 17, 2023
Int. Cl. H01L 25/18 (2023.01); H01L 23/31 (2006.01); H01L 23/34 (2006.01); H01L 23/538 (2006.01); H01R 12/79 (2011.01); H01L 23/00 (2006.01)
CPC H01L 25/18 (2013.01) [H01L 23/3107 (2013.01); H01L 23/34 (2013.01); H01L 23/5383 (2013.01); H01L 23/5385 (2013.01); H01R 12/79 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/16227 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a package substrate;
a power module on a first surface of the package substrate;
a connector on the first surface of the package substrate, the connector being horizontally spaced apart from the power module;
a first semiconductor chip on a second surface of the package substrate opposite to the first surface;
a first heat radiator on the second surface of the package substrate, the first heat radiator covering the first semiconductor chip;
a connection substrate on the second surface of the package substrate and having an opening that penetrates the connection substrate, the first semiconductor chip being in the opening; and
a dielectric layer in the opening and filling a space between the connection substrate and the first semiconductor chip,
wherein the first heat radiator is attached to one surface of the connection substrate and to a rear surface of the first semiconductor chip,
wherein at least a portion of the first semiconductor chip vertically overlaps the power module, and
wherein the first semiconductor chip is electrically connected through the package substrate to the power module.