US 12,482,785 B2
Trim free wafer bonding methods and devices
Shi Ning Ju, Hsinchu (TW); Wen-Ting Lan, Hsinchu (TW); I-Han Huang, Hsinchu (TW); Kuo-Cheng Chiang, Hsinchu (TW); and Chih-Hao Wang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 20, 2022, as Appl. No. 17/750,239.
Claims priority of provisional application 63/277,996, filed on Nov. 10, 2021.
Prior Publication US 2023/0142902 A1, May 11, 2023
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/80 (2013.01) [H01L 24/08 (2013.01); H01L 24/98 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/80006 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/35121 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device structure, comprising:
bonding a device substrate to a first de-bond layer, the first de-bond layer disposed on a first carrier substrate, the device substrate having a first side facing the first carrier substrate and a second side opposite from the first side, the device substrate having a first width;
performing a front-end-of-line (FEOL) process and a back-end-of-line (BEOL) process on the device substrate;
bonding a second carrier substrate having a second de-bond layer on the second side of the device substrate;
removing the first carrier substrate by removing the first de-bond layer, wherein a width of the device substrate remains the first width after removing the first carrier substrate;
bonding a third carrier substrate having a third de-bond layer on the first side of the device substrate; and
removing the second carrier substrate by removing the second de-bond layer, wherein the width of the device substrate remains the first width after removing the second carrier substrate.