US 12,482,761 B2
Semiconductor device package having improved conductive stub coverage
Simon Dong, Shanghai (CN); Hope Chiu, Shanghai (CN); Weiting Jiang, Shanghai (CN); Elley Zhang, Shanghai (CN); Kent Yang, Hsinchu (TW); Hua Tan, Shanghai (CN); Jerry Tang, Shanghai (CN); and Rui Guo, Shanghai (CN)
Assigned to SANDISK TECHNOLOGIES, INC., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES, INC., Milpitas, CA (US)
Filed on Oct. 25, 2021, as Appl. No. 17/510,212.
Prior Publication US 2023/0129628 A1, Apr. 27, 2023
Int. Cl. H01L 23/552 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01)
CPC H01L 23/552 (2013.01) [H01L 23/5386 (2013.01); H01L 24/14 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device package comprising:
a substrate having a plurality of layers including a bottom layer and a top layer, the bottom layer including a dielectric material defining a bottom dielectric surface of the substrate and the top layer defining a top surface of the substrate that is opposite the bottom dielectric surface;
one or more dies mounted on and electrically coupled to the top surface at the top layer of the substrate;
an electromagnetic interference (EMI) shield encapsulating the substrate and the one or more semiconductor dies;
a first plurality of conductive stubs positioned around edges of the top layer of the substrate, wherein each of the first plurality of conductive stubs includes an edge portion having a first thickness where each of the first plurality of conductive stubs directly physically contacts the EMI shield; and
a second plurality of conductive stubs positioned around edges of the bottom layer of the substrate, wherein each of the second plurality of conductive stubs includes an edge portion having a second thickness where each of the second plurality of conductive stubs directly physically contacts the EMI shield, the second thickness being less than the first thickness, and each of the second plurality of conductive stubs further includes a central portion directly connected to the edge portion at a junction and having a thickness greater than a thickness of an entirety of the edge portion between the junction and the EMI shield,
wherein the central portion does not physically contact the EMI shield, and
wherein the central portion has a first clearance from the bottom dielectric surface of the substrate and the edge portion has a second clearance from the bottom dielectric surface that is greater than the first clearance.